Flip chips using various adhesives were studied. The assembly yields using nonconductive adhesive and anisotropic conductive film investigated were 97% and 100%, respectively. A packaging process using anisotropic conductive paste with a 100% packaging yield was developed. All the packages passed various reliability tests such as burn in, artificial sweat and humidity tests, and temperature cycling tests. The reliability of the packages was 100% meeting the requirements for an industrial application. A stud bump bonding process with reduced process steps was proposed. Curing of conductive adhesive and underfill epoxy was not required, resulting in reduced packaging time.
Keywords:flip-chip devices, integrated circuit packaging, adhesives, chip scale packaging, adhesive bonding, encapsulation, integrated circuit reliability, chip-on-board packaging
Lau, J. H., 1995, Flip Chip Technologies, MacGraw–Hill, New York.
Kloeser, J., Kutzner, K., and Gross, K. 1997, “A New Production Line for Low Cost Flip Chip Assembly,” Proceedings of the Technical Program, Surface Mount International, San Jose, CA, pp. 257–266.
Development of a Reliable Packaging Process for Flip Chip on Ceramics,”
Flip Chip Assemblies Using Gold Bumps and Adhesive,”
Reliability of Flip Chips on FR-4 Assembled with Reduced Process Steps,”
Assembly and Reliability of Flip Chip on Boards Using ACAs or Eutectic Solder with Underfill,”
Bessho, Y. et al., 1990, “Chip-On-Glass Mounting Technology of LSIs for LCD Module,” IMC’90, pp. 183–189.
Potter, B., 1998, “Flip Chip Bonding Primer,” Circuits Assembly, September, pp. 72–75.
Ross, P. J., 1988, Taguchi Techniques for Quality Engineering, McGraw–Hill, New York.
Ott, E. R., 1990, Process Quality Control, McGraw–Hill, New York.
Montgomery, D. C., 1991, Design and Analysis of Experiments, Wiley, New York.
Cobb, G. W., 1998, Introduction to Design and Analysis of Experiments, Springer, New York.
Stud Bump Bond Packaging with Reduced Process Steps,”
Soldering Surf. Mount Technol.,
Copyright © 2005