In this article, we present a theoretical study on the concept known as critical clearance for flip-chip packages. The critical clearance phenomenon was first observed in an experiment reported by Gordon et al. (1999, “A Capillary-Driven Underfill Encapsulation Process,” Advanced Packaging, 8(4), pp. 34–37). When the clearance is below a critical value, filling time begins to increase dramatically, and when the clearance is above this value, the influence of clearance on filling time is insignificant. Therefore, the optimal solder bump density in a flip-chip package should be one with a clearance larger than the critical clearance. The contribution of our study is the development of a quantitative relation among package design features, flow characteristics, and critical clearance based on an analytical model we developed and reported elsewhere. This relation is further used to determine critical clearance given a type of underfill material (specifically the index of the power-law constitutive equation), the solder bump pitch, and the gap height; further the flip-chip package design can be optimized to make the actual clearance between solder bumps greater than its corresponding critical clearance.
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December 2007
Research Papers
A Theoretical Analysis of the Concept of Critical Clearance Toward a Design Methodology for the Flip-Chip Package
J. W. Wan,
J. W. Wan
College of Civil Engineering,
Guangzhou University
, Guangzhou, Guangdong, China
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W. J. Zhang,
W. J. Zhang
Department of Mechanical Engineering,
University of Saskatchewan
, Saskatoon, Saskatchewan, Canada; College of Mechanical and Power Engineering, East China University of Science and Technology
, Shanghai, China
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D. J. Bergstrom
D. J. Bergstrom
Department of Mechanical Engineering,
University of Saskatchewan
, Saskatoon, Saskatchewan, Canada
Search for other works by this author on:
J. W. Wan
College of Civil Engineering,
Guangzhou University
, Guangzhou, Guangdong, China
W. J. Zhang
Department of Mechanical Engineering,
University of Saskatchewan
, Saskatoon, Saskatchewan, Canada; College of Mechanical and Power Engineering, East China University of Science and Technology
, Shanghai, China
D. J. Bergstrom
Department of Mechanical Engineering,
University of Saskatchewan
, Saskatoon, Saskatchewan, CanadaJ. Electron. Packag. Dec 2007, 129(4): 473-478 (6 pages)
Published Online: March 13, 2007
Article history
Received:
December 12, 2006
Revised:
March 13, 2007
Citation
Wan, J. W., Zhang, W. J., and Bergstrom, D. J. (March 13, 2007). "A Theoretical Analysis of the Concept of Critical Clearance Toward a Design Methodology for the Flip-Chip Package." ASME. J. Electron. Packag. December 2007; 129(4): 473–478. https://doi.org/10.1115/1.2804098
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