In flip chip packages, it is common practice for interconnects to be encapsulated with a liquid underfill material. This paper describes the effects of different underfill processes, i.e., the conventional capillary-flow underfill and two no-flow underfill processes, on flip chip packaging. The warpage of the package was examined, and the value of this during three different underfill encapsulating processes was measured. In addition, the interconnect reliability of the bump bonds after thermal-cycling was evaluated using a test circuit. The warpage of the package before curing varied depending on the assembly process, but that after curing was almost the same for all the processes studied. It was found that the interconnect reliability is closely related to the differences in the warpage arising from the assembly process, and that the smaller change in warpage introduced by the curing process gave a higher interconnect reliability for the bump bonds. Based on these findings, lower curing temperatures are considered to be more effective for improving the mountability of the package and the interconnect reliability.
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September 2009
Research Papers
Effect of Warpage of Flip Chip Packages Due to the Underfill Encapsulating Process on Interconnect Reliability
Satoru Katsurayama,
Satoru Katsurayama
Electronic Device Material Research Laboratories II,
e-mail: katuras@sumibe.co.jp
Sumitomo Bakelite Co Ltd.
, Kiyohara Industrial Park 20-7, Utsunomiya, Tochigi 321-3231, Japan
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Hironori Tohmyoh
Hironori Tohmyoh
Department of Nanomechanics,
Tohoku University
, Aoba 6-6-01, Aramaki, Aoba-ku, Sendai 980-8579, Japan
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Satoru Katsurayama
Electronic Device Material Research Laboratories II,
Sumitomo Bakelite Co Ltd.
, Kiyohara Industrial Park 20-7, Utsunomiya, Tochigi 321-3231, Japane-mail: katuras@sumibe.co.jp
Hironori Tohmyoh
Department of Nanomechanics,
Tohoku University
, Aoba 6-6-01, Aramaki, Aoba-ku, Sendai 980-8579, JapanJ. Electron. Packag. Sep 2009, 131(3): 031005 (5 pages)
Published Online: June 23, 2009
Article history
Received:
September 18, 2008
Revised:
April 16, 2009
Published:
June 23, 2009
Citation
Katsurayama, S., and Tohmyoh, H. (June 23, 2009). "Effect of Warpage of Flip Chip Packages Due to the Underfill Encapsulating Process on Interconnect Reliability." ASME. J. Electron. Packag. September 2009; 131(3): 031005. https://doi.org/10.1115/1.3144153
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