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Keywords: silicon
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Journal Articles
Article Type: Research Papers
J. Electron. Packag. December 2011, 133(4): 041015.
Published Online: December 23, 2011
...Tohru Suwa; Hamid Hadim Although thermal performance is always a critical issue in electronic packaging design at every packaging level, there is a significant lack of reliable and efficient thermal modeling and analysis techniques at the silicon chip level. Sharp temperature increases within small...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. December 2011, 133(4): 041014.
Published Online: December 21, 2011
... in a bimaterial model. Earlier papers on this topic are based on several mutually contradictory expressions for the shear compliance of the bond layer. This paper is aimed at resolving this ambiguity and presents derivation of shear compliance on a rational basis. A numerical example is carried out for a silicon...
Journal Articles
Article Type: Carbon Nanotubes
J. Electron. Packag. June 2011, 133(2): 020907.
Published Online: June 23, 2011
... compounds palladium compounds photoacoustic effect silicon silver thermal conductivity welds As the size of electronic devices scales down and power densities increase, the demand for innovative cooling solutions becomes more imperative. Thermal interface materials (TIMs) such as thermal...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. June 2011, 133(2): 021003.
Published Online: June 22, 2011
...Chu-Hsuan Sha; Chin C. Lee Pure gold (Au) is used as a bonding medium to bond silicon (Si) chips to alumina substrates. The bonding process is performed at 260 °C with only 150 psi (1.0 MPa) static pressure applied. This is a solid-state bonding without any molten phase involved. The Au layer...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. June 2010, 132(2): 021005.
Published Online: June 23, 2010
...D. K. Harris; A. Palkar; G. Wonacott; R. Dean; F. Simionescu This study details the fabrication and measurements of a water-filled 5 mm wide by 10 mm long silicon microheat pipe (MHP) array consisting of 22 – 100 μ m square channels. This study is unique in that many experimental results reported...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. March 2010, 132(1): 011003.
Published Online: March 4, 2010
... (residual) stresses. The objective of our project is to evaluate the effects of stress on semiconductor devices. In this study, the shift of the DC characteristics of nMOSFETs during the resin-molding process was investigated experimentally. After a silicon chip including the n-type metal oxide...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. September 2009, 131(3): 031013.
Published Online: July 31, 2009
...Lung-Tai Chen; Wood-Hi Cheng This study presents a novel technique for an overmolded package of piezoresistive pressure sensors using an ultrathick photoresist sacrificial layer. A 150 μ m photoresist block is placed just on the silicon membrane of the pressure sensor and removed after the molding...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. June 2009, 131(2): 021014.
Published Online: April 28, 2009
... binding affinity, and the chromium layer has a similar, if not less, binding affinity compared with the silicon chip alone. Thus, this work demonstrates that the fabricated material stack provides an appropriate platform for antigen detection. 05 12 2007 05 02 2009 28 04 2009...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. December 2006, 128(4): 419–426.
Published Online: February 6, 2006
...M. Y. Tsai; C. H. Chen; C. S. Lin Recently, the 3D or stacked-die packages become increasingly popular for packaging ICs into a system or subsystem to satisfy the needs of low cost, small form factor, and high performance. For the applications of these packages, IC silicon wafers have to be ground...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. June 2005, 127(2): 113–119.
Published Online: June 3, 2005
... and Photonic Pacaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING . Manuscript received August 3, 2003; revision received June 13, 2004. Review conducted by: P. Lall. 03 August 2003 13 June 2004 03 06 2005 silicon conducting polymers polymer films aluminium...
Journal Articles
Article Type: Article
J. Electron. Packag. March 2005, 127(1): 38–42.
Published Online: March 21, 2005
...Xiaomei Yu; Ting Li; Lin Hao; Dacheng Zhang A polymerase chain reaction (PCR) microchip array with a dimension of 21.3×17.5 mm 2 has been fabricated by the silicon micromachining technique. The chip is composed of 192 rectangular reaction chambers with the volume of 50 nL. In order to package...
Journal Articles
Article Type: Article
J. Electron. Packag. March 2005, 127(1): 25–28.
Published Online: March 21, 2005
... consisting of an optical fiber, epoxy adhesive, and silicon substrate were simulated using a finite element analysis (FEA) package ANSYS. Experiments using real-time Moire´ interferometry were also performed at temperatures of 25, 40, 60, 85 and 100°C for confirmation of the analysis results. The study...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. September 2004, 126(3): 301–307.
Published Online: October 6, 2004
...Mitul Modi; Suresh K. Sitaraman Titanium adhesive layers are commonly used in microelectronic and MEMS applications to help improve the adhesion of other metal layers to a silicon substrate. Such Ti/Si interfaces could potentially delaminate under externally applied mechanical loads, thermally...
Journal Articles
Article Type: Research Papers
J. Electron. Packag. September 2004, 126(3): 317–324.
Published Online: October 6, 2004
... of the cooling system, the rubber bag expanded and stored the mixture of generated vapor and air. Thus the inner pressure was maintained at atmospheric pressure. In the test section, a silicon chip with dimensions of 10×10×0.5 mm 3 was attached at the bottom surface of a horizontal duct with dimensions of 10×14...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. June 2004, 126(2): 202–207.
Published Online: July 8, 2004
... devices polymers dielectric materials fracture delamination thermal stress cracking aluminium silicon Flip chip bonding technology using anisotropic conductive films (ACFs) has been used for decades in the area LCD display applications. In recent, there has been growing interest in using...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. June 2004, 126(2): 177–185.
Published Online: July 8, 2004
...X. J. Xin; Z. J. Pei; Wenjie Liu Silicon is the primary semiconductor material used to fabricate microchips. The quality of microchips depends directly on the quality of starting silicon wafers. A series of processes are required to manufacture high quality silicon wafers. Surface grinding is one...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. June 2004, 126(2): 237–246.
Published Online: July 8, 2004
... mechanical compliance in the three orthogonal directions and can accommodate the differential displacement induced by the coefficient of thermal expansion (CTE) mismatch between the silicon die and the organic substrate. In this paper, we report the wafer-level fabrication of an area-arrayed G-Helix...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. March 2004, 126(1): 120–123.
Published Online: April 30, 2004
...Hong-Seok Min; Young-Chang Joo; Oh-Sung Song We studied cleaning and annealing effects in glass/Si direct bonding using 4 inch Pyrex glass and silicon wafers. SPM cleaning (sulfuric-peroxide mixture, H 2 SO 4 : H 2 O 2 = 4 : 1 , 120 ° C ) , RCA cleaning ( NH 4 OH : H 2 O 2 : H 2 O = 1 : 1 : 5 , 80...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. March 2004, 126(1): 110–114.
Published Online: April 30, 2004
...Neil McLellan; Nelson Fan; Shilai Liu; Kim Lau; Jingshen Wu A systematic investigation on the effects of wafer thinning process on the surface roughness, morphology and fracture strength of silicon chips was conducted. The results of the study suggest that the fracture strength of the silicon chips...
Journal Articles
Article Type: Technical Papers
J. Electron. Packag. March 2003, 125(1): 114–119.
Published Online: March 14, 2003
...B. Cotterell; Z. Chen; J.-B. Han; N.-X. Tan The mechanical reliability of silicon dies is affected by the defects introduced by surface grinding and edge dicing. The ring-on-ring and the four-point-bend test have been used in this study to separate the distribution in strength for these two types...