The removal of high heat fluxes from BeO ceramic and GaN-on-SiC semiconductor dies using hierarchically branched-microchannel coolers is investigated, in order to examine the impact of the number of branching levels on performance. The microchannel coolers are made by lithography and deep reactive ion etching of single crystal silicon. The test dies contain a dc-operated resistive zone that approximates the spatially averaged heat flux that would appear in low-temperature cofired ceramic microwave circuit packages and in monolithic microwave integrated circuits. For the particular geometric constraints selected for the study (three source/exhaust channels, 5×5mm2 die footprint, 200μm deep channels in a 400μm thick silicon wafer), the optimum performance is achieved with three hierarchical levels of branched-channel size. A heat flux of 1.5kW/cm2 is removed from the 3.6×4.7mm2 resistive zone of the BeO-based die, at a surface temperature of 203°C. When attached instead to a high thermal conductivity GaN-on-SiC die with a 1.2×5mm2 resistive zone, a heat flux of 3.9kW/cm2 is removed from the resistive zone at 198°C surface temperature. The total water flow rate is 275 ml/min in both situations. The experimental results are found to be in reasonable agreement with finite element simulations based on idealized estimates of convection coefficients within the channels. For the three-channel size configuration, an effective heat transfer coefficient in the range of 12.213.4W/cm2K (with respect to a 20°C bulk fluid temperature) is inferred to be present on the top of the microchannel cooler, based on simulations and derived values obtained from the experimental data.

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