New generation supercomputers with three dimensional stacked chip architectures pose a major challenge with respect to the removal of dissipated heat, which can reach currently as high as in multilayer chip stacks of less than volume. Interlayer integrated water cooling is a very promising approach for such high heat flux removal due to much larger thermal capacity and conductivity of water compared with air, the traditional cooling fluid. In the current work, a multiscale conjugate heat transfer model is developed for integrated water cooling of chip layers and validated with experimental measurements on an especially designed thermal test vehicle that simulates a four tier chip stack with a footprint of . The cooling heat transfer structure, which consists of microchannels with cylindrical pin-fins, is conceived in such a way that it can be directly integrated with the device layout in multilayer chips. Every composite layer is cooled by water flow in microchannels (height of ), which are arranged in two port water inlet-outlet configuration. The total power removed in the stack is 390 W at a temperature gradient budget of 60 K from liquid inlet to maximal junction temperature, corresponding to about volumetric heat flow. The computational cost and complexity of detailed computational fluid dynamics (CFD) modeling of heat transfer in stacked chips with integrated cooling can be prohibitive. Therefore, the heat transfer structure is modeled using a porous medium approach, where the model parameters of heat transfer and hydrodynamic resistance are derived from averaging the results of the detailed 3D-CFD simulations of a single streamwise row of fins. The modeling results indicate that an isotropic porous medium model does not accurately predict the measured temperature fields. The variation of material properties due to temperature gradients is found to be large; therefore, variable properties are used in the model. It is also shown that the modeling of the heat transfer in the cooling sublayers requires the implementation of a porous medium approach with a local thermal nonequilibrium, as well as orthotropic heat conduction and hydrodynamic resistance. The improved model reproduces the temperatures measured in the stack within 10%. The model is used to predict the behavior of multilayer stacks mimicking the change of heat fluxes resulting from variations in the computational load of the chips during their operation.
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e-mail: poulikakos@ethz.ch
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December 2010
This article was originally published in
Journal of Heat Transfer
Research Papers
3D Integrated Water Cooling of a Composite Multilayer Stack of Chips
Fabio Alfieri,
Fabio Alfieri
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
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Manish K. Tiwari,
Manish K. Tiwari
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
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Igor Zinovik,
Igor Zinovik
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
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Dimos Poulikakos,
Dimos Poulikakos
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
e-mail: poulikakos@ethz.ch
ETH Zurich
, 8092 Zurich, Switzerland
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Thomas Brunschwiler,
Thomas Brunschwiler
Advanced Thermal Packaging, IBM Zurich Research Laboratory,
IBM Research GmbH
, 8803 Rueschlikon, Switzerland
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Bruno Michel
Bruno Michel
Advanced Thermal Packaging, IBM Zurich Research Laboratory,
IBM Research GmbH
, 8803 Rueschlikon, Switzerland
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Fabio Alfieri
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
Manish K. Tiwari
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
Igor Zinovik
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerland
Dimos Poulikakos
Department of Mechanical and Process Engineering, Laboratory of Thermodynamics in Emerging Technologies,
ETH Zurich
, 8092 Zurich, Switzerlande-mail: poulikakos@ethz.ch
Thomas Brunschwiler
Advanced Thermal Packaging, IBM Zurich Research Laboratory,
IBM Research GmbH
, 8803 Rueschlikon, Switzerland
Bruno Michel
Advanced Thermal Packaging, IBM Zurich Research Laboratory,
IBM Research GmbH
, 8803 Rueschlikon, SwitzerlandJ. Heat Transfer. Dec 2010, 132(12): 121402 (9 pages)
Published Online: September 22, 2010
Article history
Received:
February 9, 2010
Revised:
July 21, 2010
Online:
September 22, 2010
Published:
September 22, 2010
Citation
Alfieri, F., Tiwari, M. K., Zinovik, I., Poulikakos, D., Brunschwiler, T., and Michel, B. (September 22, 2010). "3D Integrated Water Cooling of a Composite Multilayer Stack of Chips." ASME. J. Heat Transfer. December 2010; 132(12): 121402. https://doi.org/10.1115/1.4002287
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